Embedded-mask-methods for mm-scale multi-layer vertical/slanted Si structures

Proceedings of the IEEE Micro Electro Mechanical Systems (MEMS)

Volumn , Issue , 2000, Pages 300-305

  Mita, Yoshio ^a   Mita, Makoto ^a   Tixier, Agnes ^a   Gouy, Jean Philippe ^a   Fujita, Hiroyuki ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANISOTROPY; ASPECT RATIO; ELECTRONICS PACKAGING; ETCHING; MASKS; MICROMACHINING; SILICON WAFERS;

DELAY MASKING; EMBEDDED MASK METHOD;

MICROELECTROMECHANICAL DEVICES;

EID: 0033692511     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (6)