Real-time per-cycle energy consumption measurement of digital systems

Electronics Letters

Volumn 36, Issue 13, 2000, Pages 1169-1171

  Chang, Naehyuck ^a   Kim, Kwanho ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE TRANSFER DEVICES; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POWER MEASUREMENT; ELECTRIC POWER SUPPLIES TO APPARATUS; SYNCHRONOUS MACHINERY;

CLOCK FREQUENCY; PER CLOCK CYCLE MEASUREMENT; POWER ANALYSIS;

DIGITAL DEVICES;

EID: 0033689080     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20000811     Document Type: Article

References (4)

1. CHEN, R.YU, OWENS, K.M., IRWIN, M.J., and BAJWA, R.S.: 'Validation of an architectural level power analysis technique'. Proc. 35th Design Automation Conf., June 1998, pp. 242-245
2. SIMUNIC, T., BENINI, L., and DE MICHELI, G.: 'Cycle-accurate simulation of energy consumption in embedded systems'. Proc. 36th Design Automation Conf., June 1999, pp. 867-872
3. TIWARY, V., MALIK, S., and WOLFE, A.: 'Power analysis of embedded software: A first step towards software power minimization', IEEE Trans. VLSI Syst., 1994, 2, (4), pp. 437-445
4. RUSSELL, J.T., and JACOME, M.F.: 'Software power estimation and optimization for high perfomance, 32-bit embedded processors'. Proc. Int. Conf. Computer Design, Oct. 1998, pp. 328-333