New pipelined digit serial-parallel multiplier

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2000, Pages

  Nibouche, O ^a   Bouridane, A ^a   Nibouche, M ^a   Crookes, D ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; DIGITAL SIGNAL PROCESSING; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; VLSI CIRCUITS;

CARRY SAVE ADDERS (CSA); PIPELINED DIGIT SERIAL-PARALLEL MULTIPLIERS;

MULTIPLYING CIRCUITS;

EID: 0033685459     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2000.857013     Document Type: Conference Paper

References (13)