Use of carry-save representation in joint module selection and retiming

Proceedings - Design Automation Conference

Volumn , Issue , 2000, Pages 768-773

  Yu, Zhan ^a   Khoo, Kei Yong ^a   Willson Jr , Alan N ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; DIGITAL ARITHMETIC; GRAPH THEORY; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; PROBLEM SOLVING; VLSI CIRCUITS;

CARRY SAVE SIGNAL REPRESENTATION; HIGH SPEED CIRCUIT; JOINT MODULE SELECTION; MIXED REPRESENTATION DATA FLOW GRAPH; RETIMING TECHNIQUE;

LOGIC DESIGN;

EID: 0033684577     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/337292.337773     Document Type: Conference Paper

References (6)