Optimization of sequential verification by history-based dynamic minimization of BDDS

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 2000, Pages

  Drechsler, Rolf ^a   Guenther, Wolfgang ^a  

^a UNIVERSITY OF FREIBURG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; DECISION THEORY; ELECTRIC NETWORK ANALYSIS; OPTIMIZATION;

BINARY DECISION DIAGRAMS;

SEQUENTIAL CIRCUITS;

EID: 0033684534     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2000.858857     Document Type: Conference Paper

References (19)