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Volumn 2, Issue , 2000, Pages
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Parallel tabu search algorithm for VLSI standard-cell placement
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTATIONAL COMPLEXITY;
ELECTRIC NETWORK ANALYSIS;
ELECTRIC NETWORK SYNTHESIS;
HEURISTIC METHODS;
INTEGRATED CIRCUIT LAYOUT;
INTERCONNECTION NETWORKS;
PARALLEL ALGORITHMS;
PARALLEL PROCESSING SYSTEMS;
PROBABILITY DENSITY FUNCTION;
PROBABILITY DISTRIBUTIONS;
DOMAIN DECOMPOSITION METHODS;
PARALLEL TABU SEARCH ALGORITHMS;
VLSI CIRCUITS;
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EID: 0033683898
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ISCAS.2000.856395 Document Type: Conference Paper |
Times cited : (11)
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References (7)
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