1.6 Gb/s/pin 4-PAM signaling and circuits for a multi-drop bus

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2000, Pages 128-131

  Zerbe, Jared L ^a   Chau, Pak S ^a   Werner, Carl W ^a   Thrush, Timothy P ^a   Perino, Donald V ^a   Garlepp, Bruno W ^a   Donnelly, Kevin S ^a  

^a RAMBUS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; MICROPROCESSOR CHIPS; PULSE AMPLITUDE MODULATION; SIGNAL TO NOISE RATIO;

MULTIDROP SIGNALING SYSTEMS;

CMOS INTEGRATED CIRCUITS;

EID: 0033683212     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)