Efficient approach for in-place scheduling of path metric update in Viterbi decoders

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 2000, Pages

  Wu, Chien Ming ^a   Shieh, Ming Der ^a   Wu, Chien Hsing ^a   Sheu, Ming Hwa ^a  

^a NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER ARCHITECTURE; DECODING; INTERCONNECTION NETWORKS;

EQUIVALENT MEMORY BANDWIDTHS; VITERBI DECODERS;

VLSI CIRCUITS;

EID: 0033683088     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2000.855996     Document Type: Conference Paper

References (10)