High performance 80-nm gate length SOI-CMOS technology with copper and very-low-k interconnects

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2000, Pages 186-187

  Sukegawa, K ^a   Yamaji, M ^a   Yoshie, K ^a   Furumochi, K ^a   Maruyama, T ^a   Morioka, H ^a   Naori, N ^a   Kubo, T ^a   Kanata, H ^a   Kai, M ^a   Satoh, S ^a   Izawa, T ^a   Kubota, K ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COPPER; CURRENT VOLTAGE CHARACTERISTICS; ELECTRON BEAM LITHOGRAPHY; SILICON ON INSULATOR TECHNOLOGY;

COPPER DUAL-DAMASCENE INTERCONNECTS;

CMOS INTEGRATED CIRCUITS;

EID: 0033682374     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)