CMOS-logic-circuit-compatible DRAM circuit designs for wide-voltage and wide-temperature-range applications

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2000, Pages 120-121

  Mizuno, Hiroyuki ^a   Oodaira, Nobuhiro ^a   Kanno, Yusuke ^a   Sakata, Takeshi ^a   Watanabe, Takao ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; MICROPROCESSOR CHIPS;

CMOS LOGIC CIRCUITS;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0033682271     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)