6-bit 1 GHz acquisition speed CMOS flash ADC with digital error correction

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2000, Pages 249-252

  Uyttenhove, K ^a   Marques, A ^a   Steyaert, M ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CAPACITANCE; COMPARATOR CIRCUITS; DIFFERENTIAL AMPLIFIERS; ERROR CORRECTION; INTEGRATED CIRCUIT LAYOUT; LADDER NETWORKS; LOGIC DESIGN; LOGIC GATES; SIGNAL TO NOISE RATIO; TRANSCONDUCTANCE;

DIGITAL ERROR CORRECTION; FLASH CONVERTER; NAND GATE; SPURIOUS FREE DYNAMIC RANGE;

CMOS INTEGRATED CIRCUITS;

EID: 0033682269     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)