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Volumn , Issue , 2000, Pages 308-311
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Power minimization derived from architectural-usage of VLIW processors
a
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Author keywords
[No Author keywords available]
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Indexed keywords
CODES (SYMBOLS);
COSINE TRANSFORMS;
ELECTRIC CURRENTS;
ELECTRIC POWER SUPPLIES TO APPARATUS;
EMBEDDED SYSTEMS;
HIGH LEVEL LANGUAGES;
IIR FILTERS;
MICROCOMPUTERS;
REGRESSION ANALYSIS;
ARCHITECTURAL USAGE VARIABLE;
OPERATION REBINDING TECHNIQUE;
POWER CODE GENERATION TECHNIQUE;
POWER MINIMIZATION;
POWER PREDICTION EQUATION;
VERY LONG INSTRUCTION WORD PROCESSOR;
DIGITAL SIGNAL PROCESSING;
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EID: 0033681627
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/337292.337426 Document Type: Conference Paper |
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Times cited : (23)
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References (11)
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