Low-jitter and low-power phase-locked loop design

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2000, Pages

  Chen, Kuo Hsing ^a   Liao, Huan Sen ^a   Tzou, Lin Jiunn ^a  

^a TAMKANG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; OSCILLATORS (ELECTRONIC);

PHASE FREQUENCY DETECTORS; VOLTAGE CONTROLLED OSCILLATORS;

PHASE LOCKED LOOPS;

EID: 0033681625     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2000.856310     Document Type: Conference Paper

References (8)