Performance limits of planar and multi-layer integrated inductors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2000, Pages

  Koutsoyannopoulos, Yorgos ^a   Papananos, Yannis ^a   Bantas, Sotiris ^a   Alemanni, Carlo ^a  

^a NATIONAL TECHNICAL UNIVERSITY OF ATHENS   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK TOPOLOGY; MATHEMATICAL MODELS; NATURAL FREQUENCIES;

MULTILAYER INTEGRATED INDUCTORS;

ELECTRIC INDUCTORS;

EID: 0033681623     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2000.856283     Document Type: Conference Paper

References (8)