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Volumn , Issue , 2000, Pages 260-265
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Critical path analysis using a dynamically bounded delay model
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTER SIMULATION;
COUPLED CIRCUITS;
CRITICAL PATH ANALYSIS;
INTEGER PROGRAMMING;
LINEAR PROGRAMMING;
LOGIC GATES;
PERT;
DYNAMICALLY BOUNDED DELAY;
STATIC TIMING ANALYSIS;
TIMING CIRCUITS;
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EID: 0033681622
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/337292.337413 Document Type: Conference Paper |
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Times cited : (23)
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References (23)
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