Evaluation of move-based multi-way partitioning algorithms

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2000, Pages 363-369

  Yarack, Elie ^a   Carletta, Joan ^a  

^a HEWLETT PACKARD ENTERPRISE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; RANDOM PROCESSES; RESPONSE TIME (COMPUTER SYSTEMS);

MULTI-WAY PARTITIONING ALGORITHMS;

VLSI CIRCUITS;

EID: 0033681401     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)