Modeling of direct tunneling current through gate dielectric stacks

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn , Issue , 2000, Pages 200-203

  Mudanai, S ^a   Fan, Y Y ^a   Ouyang, Q ^a   Tasch, A F ^a   Register, F ^a   Kwong, D L ^a   Banerjee, S ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TUNNELING; GATES (TRANSISTOR); INTERFACES (MATERIALS); PERMITTIVITY; PERTURBATION TECHNIQUES; SUBSTRATES;

DIRECT TUNNELING CURRENTS; SCHRODINGER EQUATION;

CMOS INTEGRATED CIRCUITS;

EID: 0033681262     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (12)