Low level watermarking of VLSI designs for intellectual property protection

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 2000, Pages 136-140

  Irby, David L ^a   Newbould, Rexford D ^a   Carothers, Jo Dale ^a   Rodriguez, Jeffrey J ^a   Holman, W Timothy ^a  

^a UNIVERSITY OF ARIZONA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTELLECTUAL PROPERTY; TRANSISTORS;

WATERMARKING;

VLSI CIRCUITS;

EID: 0033680790     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)