Efficient logic optimization using regularity extraction

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2000, Pages 487-493

  Kutzschebauch, Thomas ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CORRELATION METHODS; FORMAL LANGUAGES; LOGIC DESIGN; MINIMIZATION OF SWITCHING NETS;

FUNCTIONAL REGULARITY EXTRACTION ALGORITHMS; REGULAR STRUCTURES;

VLSI CIRCUITS;

EID: 0033680672     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)