A novel genetic algorithm for the automated design of performance driven digital circuits

Proceedings of the 2000 Congress on Evolutionary Computation, CEC 2000

Volumn 1, Issue , 2000, Pages 601-608

  Hounsell, Ben I ^a   Arslan, Tughrul ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BENCHMARKING; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DIGITAL LIBRARIES; ELECTRIC NETWORK ANALYSIS; GENETIC ALGORITHMS; HARDWARE; INTEGRATING CIRCUITS; LOGIC CIRCUITS; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT LAYOUT;

ARITHMETIC CIRCUIT; COMPONENT LIBRARIES; EVOLVABLE HARDWARE; HARDWARE EVALUATIONS; NOVEL GENETIC ALGORITHM; PERFORMANCE ISSUES; PERFORMANCE-DRIVEN; SIMULATION AND ANALYSIS;

TIMING CIRCUITS; DIGITAL CIRCUITS;

ARITHMETIC CIRCUITS; TIMING RESTRICTIONS; VIRTUAL CHIP;

EID: 0033675957     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CEC.2000.870353     Document Type: Conference Paper

References (12)

1. Goldberg, D. E., Genetic Algorithms in Search, Optimization and Machine Learning. Addison-Wesley, 1989
2. Back, T., Evolutionary Algorithms in theory and Practice. Evolutionary Strategies Evolutionary Programming Genetic Algorithms. Oxford University Press, 1996
3. Thompson, A., Layzell, P., and Zebulum, R. S., 'Explorations in design space: Unconventional electronics design through artificial evolution', IEEE Transactions on Evolutionary Computation, 3(3), 267-196, September 1999
4. Zebulum, R. S., Pacheco, M. A., and Vellasco, M., 'Evolvable systems in hardware design taxonomy, survey and applications', in Evolvable Systems: From Biology to Hardware. (ICES 96), pp. 344-358,1996
5. Arslan, T., Horrocks, D. H., and Ozdemir, E., 'Structural cell-based vlsi circuit design using a genetic algorithm', in IEEE International Symposium on Circuits and Systems, pp. 308-311, Atlanta, USA, 1996
6. Miller, J. F. and Thompson, P., 'Aspects of digital evolution: Geometry and learning', in Evolvable Systems: From Biology to Hardware. (ICES 98), pp. 25-35, 1998
7. Pedram, M., 'Power minimisation in ic design: Principles and applications', ACM Transations on Design Automation of Electronic Systems, 1(1), 3-56, January 1996
8. Ashenden, P. J., The Designer's Guide to VHDL. Morgan Kaufmann Publishers, Inc, 1995
9. Levi, D. and Guccione, S. A., 'Geneticfpga: Evolving stable circuits on mainstream fpgas', in A. Stoica, D. Keymeulen, and J. L. (Eds.), editors, In Proceedings of the First NASA/DOD Workshop on Evolvable Hardware, pp. 12-17. IEEE Computer Society Press, Los Alarhitos, July 1999
10. Cadence Design Systems, Inc., BuildGates User Guide, release 2.3 edition, March 1999
11. Torresen, J., 'Increased complexity evolution applied to evolvable hardware', in B. Drs. Dagli, editor, Smart Engineering System Design: Neural Networks, Fuzzy Logic , Evolutionary Programming and Complex Systems, pp. X-Y, St. Louis, USA, November 1999. ANNIE'99, ASME press
12. Ozdemir, E., Evolutionary methods for the design of digital circuits and systems, Ph.D. thesis, The University of Wales, Cardiff, 1999