Voltage scheduling in the IpARM microprocessor system

Proceedings of the International Symposium on Low Power Design

Volumn , Issue , 2000, Pages 96-101

  Pering, Trevor ^a   Burd, Thomas ^a   Brodersen, Robert ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED NETWORK ANALYSIS; DOS; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; RESPONSE TIME (COMPUTER SYSTEMS); VOLTAGE CONTROL;

DYNAMIC VOLTAGE SCALING (DVS) METHOD;

POWER ELECTRONICS;

EID: 0033671877     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/lpe.2000.155260     Document Type: Conference Paper

References (16)