Dual-VT SRAM cells with full-swing single-ended bit line sensing for high-performance on-chip cache in 0.13 μm technology generation

Proceedings of the International Symposium on Low Power Design

Volumn , Issue , 2000, Pages 15-19

  Hamzaoglu, Fatih ^a   Ye, Yibin ^a   Keshavarzi, Ali ^a   Zhang, Kevin ^a   Narendra, Siva ^a   Borkar, Shekhar ^a   Stan, Mircea ^a   De, Vivek ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; GAIN CONTROL; LEAKAGE CURRENTS; MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE;

ON-CHIP CACHES; SINGLE-ENDED SENSING;

POWER ELECTRONICS;

EID: 0033670989     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/344166.344182     Document Type: Conference Paper

References (8)