A super-serial Galois fields multiplier for FPGAs and its application to public-key algorithms

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1999, Pages 232-239

  Orlando, Gerardo ^a   Paar, Christof ^b  

^a GTE Systems and Technology   (United States)

^b WORCESTER POLYTECHNIC INSTITUTE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL GEOMETRY; COMPUTATIONAL METHODS; FLIP FLOP CIRCUITS; FUNCTION GENERATORS; MULTIPLYING CIRCUITS; PUBLIC KEY CRYPTOGRAPHY; REQUIREMENTS ENGINEERING; TIME SHARING SYSTEMS;

ELLIPTIC CURVE CRYPTOSYSTEM; PROGRAMMABLE MULTIPLIERS; PUBLIC KEY ALGORITHMS; PUBLIC KEY CRYPTOSYSTEMS; SUPER SERIAL GALOIS FIELDS MULTIPLIER;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033488538     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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