Algorithm analysis and mapping environment for adaptive computing systems: Further results

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1999, Pages 264-265

  Pauer, Eric K ^a   Fiore, Paul D ^a   Smith, John M ^a  

^a LOCKHEED MARTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE ALGORITHMS; ADAPTIVE SYSTEMS; CONFORMAL MAPPING; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; FUNCTION GENERATORS; LOGIC PROGRAMMING; OPTIMIZATION; REQUIREMENTS ENGINEERING;

ADAPTIVE COMPUTING SYSTEMS; ALGORITHM ANALYSIS; ALGORITHM MAPPING; GENERAL PURPOSE LOGIC SYNTHESIS; SIGNAL PROCESSING ALGORITHM; SMART GENERATORS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033488495     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. E. Pauer, C. Myers, P. D. Fiore, C. M. Crawford, E. A. Lee, J. A. Lundblad, and C. X. Hylands. Algorithm analysis and mapping environment for adaptive computing system. In Proc. Second Annual Workshop on High Performance Embedded Computing (HPEC). MIT Lincoln Laboratory, September 1998.
2. Ptolemy home page, University of California, Berkeley. http://ptolemy.eecs.berkeley.edu, 1999.
3. P. D. Fiore, C. Myers, J. M. Smith, and E. Pauer. Rapid implementation of mathematical and DSP algorithms in configurable computing devices. In Proc. Configurable Computing: Technology and Applications, part of SPIE Intl. Symposium on Voice, Video and Data Comm., November 1998.
4. Xilinx Corporation. The programmable logic data book. http://www.xilinx.com, 1999.
5. Annapolis Microsystems. Wildfire: A family of reconfigurable computing engines. http://www.annapmicro.com, 1999.
6. P. D. Fiore. Low complexity implementation of a polyphase filter bank. Digital Signal Processing, A Review Journal, 8(2):126-135, April 1998.