Using dynamic cache management techniques to reduce energy in a high-performance processor

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 1999, Pages 64-69

  Bellas, Nikolaos ^a   Hajj, Ibrahim ^a   Polychronopoulos, Constantine ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS PROGRAMMING; ELECTRIC LOSSES; RESPONSE TIME (COMPUTER SYSTEMS); STORAGE ALLOCATION (COMPUTER);

DYNAMIC CACHE MANAGEMENT TECHNIQUES; INSTRUCTION CACHE (I-CACHE);

BUFFER STORAGE;

EID: 0033363851     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/313817.313856     Document Type: Article

References (15)