Low power synthesis of dual threshold voltage CMOS VLSI circuits

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 1999, Pages 139-144

  Sundararajan, Vijay ^a   Parhi, Keshab K ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; ELECTRIC NETWORK SYNTHESIS; LEAKAGE CURRENTS; POWER ELECTRONICS; THRESHOLD VOLTAGE;

DUAL THRESHOLD VOLTAGE;

VLSI CIRCUITS;

EID: 0033359507     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/313817.313900     Document Type: Article

References (15)