VIP - an input pattern generator for identifying critical voltage drop for deep sub-micron designs

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 1999, Pages 156-161

  Jiang, Yi Min ^a   Young, Tak K ^a   Cheng, Kwang Ting ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; COMPUTER SIMULATION; ELECTRIC NETWORK ANALYSIS; ELECTRIC POTENTIAL; GENETIC ALGORITHMS; GRAPH THEORY;

INPUT PATTERN GENERATORS; VOLTAGE DROP;

ELECTRIC NETWORK SYNTHESIS;

EID: 0033359193     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (11)