Power scalable processing using Distributed Arithmetic

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 1999, Pages 170-175

  Amirtharajah, Rajeevan ^a   Xanthopoulos, Thucydides ^a   Chandrakasan, Anantha ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; ENERGY DISSIPATION; INTEGRATED CIRCUIT LAYOUT;

DISTRIBUTED ARITHMETIC (DA) METHOD; LOW-POWER DESIGN;

VLSI CIRCUITS;

EID: 0033358772     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/313817.313911     Document Type: Article

References (14)