Low power design of an acoustic echo canceller Gmdfα algorithm on dedicated VLSI architectures

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 1999, Pages 334-335

  Gailhard, S ^a   Julien, N ^a   Baganne, A ^a   Martin, E ^a  

^a LESTER UBS Lab   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE FILTERING; ALGORITHMS; COMPUTER AIDED DESIGN; DIGITAL SIGNAL PROCESSING; ECHO SUPPRESSION; OPTIMIZATION; REAL TIME SYSTEMS; VLSI CIRCUITS;

ACOUSTIC ECHO CANCELLER; GENERALIZED MULTIDELAY ADAPTIVE FILTER; OVERSAMPLING FACTOR; POWER DISSIPATION;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033358324     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)