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Volumn , Issue , 1999, Pages 33-40

Defining SRAM resistive defects and their simulation stimuli

Author keywords

[No Author keywords available]

Indexed keywords

MEMORY CELL ARRAY FAULTS (MCAF); RESISTIVE DEFECTS; SOFTWARE PACKAGE SPICE; SYNTHETIC RANDOM ACCESS MEMORY (SRAM);

EID: 0033357317     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article
Times cited : (7)

References (12)
  • 1
    • 0027557490 scopus 로고
    • A new test evaluation chip for low- cost memory tests
    • March
    • M. Inoue et al., A New Test Evaluation Chip for Low- Cost Memory Tests, IEEE Design and Test of Com- puters, Vol. 10, No. 1, pp. 15-19, March 1993.
    • (1993) IEEE Design and Test of Computers , vol.10 , Issue.1 , pp. 15-19
    • Inoue, M.1
  • 2
    • 0023965855 scopus 로고
    • Testing of random access memories: Theory and practice
    • P.K. Veenstra et al., Testing of Random Access Memories: Theory and Practice, IEE Proceedings G, 135 (1), pp. 24-28, 1988.
    • (1988) IEE Proceedings G , vol.135 , Issue.1 , pp. 24-28
    • Veenstra, P.K.1
  • 4
    • 0025442736 scopus 로고
    • A realistic fault model and test algorithms for static random access memories
    • R. Dekker et al., A Realistic Fault Model and Test Algorithms for Static Random Access Memories, IEEE Trans. on Computers, C-9 (6), pp. 567-572, 1990.
    • (1990) IEEE Trans. on Computers , vol.C-9 , Issue.6 , pp. 567-572
    • Dekker, R.1
  • 6
    • 0030171592 scopus 로고    scopus 로고
    • Hierarchical fault modeling for linear analog circuits
    • June-July
    • N. Nagi and J.A. Abraham, Hierarchical Fault Model- ing for Linear Analog Circuits, Analog Integrated Circuits and Signal Processing, Vol. 10, Nr. 1-2, pp.89-99, June-July 1996.
    • (1996) Analog Integrated Circuits and Signal Processing , vol.10 , Issue.1-2 , pp. 89-99
    • Nagi, N.1    Abraham, J.A.2
  • 7
    • 0027609172 scopus 로고
    • Failure analysis of high-density CMOS SRAMS
    • June
    • S. Naik et al., Failure Analysis of High-Density CMOS SRAMs, IEEE Design & Test of Computers, Vol. 10, Nr. 1, pp. 13-23, June 1993.
    • (1993) IEEE Design & Test of Computers , vol.10 , Issue.1 , pp. 13-23
    • Naik, S.1
  • 8
    • 0032307267 scopus 로고    scopus 로고
    • Cache RAM inductive fault analysis with fab defect modeling
    • T.M. Mak et al., Cache RAM Inductive Fault Analysis with Fab Defect Modeling, Proc. IEEE Int. Test Conf., pp. 862-871, 1998.
    • (1998) Proc. IEEE Int. Test Conf. , pp. 862-871
    • Mak, T.M.1
  • 10
    • 0003984121 scopus 로고
    • Meta-Software, Inc., Camp- bell, California
    • HSPICE User's Manual, Meta-Software, Inc., Camp- bell, California, 1993.
    • (1993) HSPICE User's Manual
  • 12
    • 0008974173 scopus 로고    scopus 로고
    • Circuit structures, design requirements and fault simulations for CMOS SRAMs
    • Department of Information Technology and Systems, Delft University of Technology, Delft
    • J.E. Simonse, Circuit Structures, Design Requirements and Fault Simulations for CMOS SRAMs, TUD Re- port No. 1-68340-44(1998)-09, Department of Information Technology and Systems, Delft University of Technology, Delft, 1998.
    • (1998) TUD Report No. 1-68340-44(1998)-09
    • Simonse, J.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.