Compiler-driven cached code compression schemes for embedded ILP processors

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1999, Pages 82-92

  Larin, Sergei Y ^a   Conte, Thomas M ^a  

^a NORTH CAROLINA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; DATA COMPRESSION; EMBEDDED SYSTEMS; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; PIPELINE PROCESSING SYSTEMS; PROGRAM COMPILERS;

CACHE CODE COMPRESSION METHODS;

MICROPROCESSOR CHIPS;

EID: 0033357301     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (27)