On the chicken-and-egg problem of determining the effect of crosstalk on delay in integrated circuits

IEEE Topical Meeting on Electrical Performance of Electronic Packaging

Volumn , Issue , 1999, Pages 245-248

  Sapatnekar, Sachin S ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMMUNICATION CHANNELS (INFORMATION THEORY); CONGESTION CONTROL (COMMUNICATION); CROSSTALK; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; PROBLEM SOLVING; ROUTERS; TELECOMMUNICATION TRAFFIC;

CHANNEL ROUTERS; WORST-CASE COMPLEXITY;

ELECTRONICS PACKAGING;

EID: 0033351076     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (9)