Determining redundancy requirements for memory arrays with critical area analysis

Records of the IEEE International Workshop on Memory Technology, Design and Testing

Volumn , Issue , 1999, Pages 48-53

  Segal, Julie D ^a   Bakarian, Sergei ^a   Colburn, Jonathon E ^a   Kumar, Madan ^a   Hong, Chang ^a   Shubat, Alex ^a  

^a HPL Technologies Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ERRORS; KNOWLEDGE BASED SYSTEMS; MICROPROCESSOR CHIPS; PROBABILITY; RANDOM ACCESS STORAGE; REDUNDANCY; STATISTICAL METHODS;

BITMAP SIGNATURES; CRITICAL AREA ANALYSIS; INLINE DEFECT DATA; MEMORY ARRAYS; MEMORY DESIGN; POISSON STATISTICS; RULE BASED ALGORITHMS;

CELLULAR ARRAYS;

EID: 0033350201     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (5)