Equivalent circuit modeling of single and coupled on-chip interconnects on lossy silicon substrate

IEEE Topical Meeting on Electrical Performance of Electronic Packaging

Volumn , Issue , 1999, Pages 185-188

  Zheng, J ^a   Hahm, Y C ^a   Weisshaar, A ^a   Tripathi, V K ^a  

^a OREGON STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC NETWORK ANALYSIS; EQUIVALENT CIRCUITS; MATHEMATICAL MODELS; SILICON WAFERS;

COUPLED ON-CHIP INTERCONNECTS;

MICROPROCESSOR CHIPS;

EID: 0033348814     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (6)