Modified LRU policies for improving second-level cache behavior

IEEE High-Performance Computer Architecture Symposium Proceedings

Volumn , Issue , 1999, Pages 49-60

  Wong, Wayne A ^a   Baer, Jean Loup ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; DATA PROCESSING; MICROPROCESSOR CHIPS; ONLINE SYSTEMS;

MAIN MEMORY ACCESSES; REPLACEMENT ALGORITHMS; SECOND LEVEL CACHE; TEMPORAL LOCALITY;

BUFFER STORAGE;

EID: 0033347360     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)