Combining static and dynamic branch prediction to reduce destructive aliasing

IEEE High-Performance Computer Architecture Symposium Proceedings

Volumn , Issue , 1999, Pages 251-262

  Patil, Harish ^a   Emer, Joel ^a  

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALPHA ARCHITECTURE; DESTRUCTIVE ALIASING; DYNAMIC BRANCH PREDICTOR; PROGRAM STRUCTURE; STATIC BRANCH PREDICTOR;

COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; DATA STRUCTURES; PROGRAM COMPILERS; RESPONSE TIME (COMPUTER SYSTEMS); SOFTWARE ENGINEERING;

MICROCOMPUTERS;

EID: 0033345918     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)