Parallel implementation of multidimensional transforms without interprocessor communication

IEEE Transactions on Computers

Volumn 48, Issue 9, 1999, Pages 951-961

  Marino, Francescomaria ^b   Swartzlander Jr , Earl E ^a,c  

^a IEEE

^b POLITECNICO DI BARI   (Italy)

^c The University of Texas at Austin   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; FAST FOURIER TRANSFORMS; GENERAL PURPOSE COMPUTERS; MATRIX ALGEBRA; SYSTOLIC ARRAYS; VECTORS; VLSI CIRCUITS;

INTERPROCESSOR COMMUNICATIONS; MATRIX VECTOR MULTIPLICATION; MULTIDIMENSIONAL TRANSFORMS; SYSTOLIC VLSI ARCHITECTURE;

PARALLEL PROCESSING SYSTEMS;

EID: 0033344480     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.795223     Document Type: Article

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