Critical path identification and delay tests of dynamic circuits

IEEE International Test Conference (TC)

Volumn , Issue , 1999, Pages 421-430

  Lee, Kyung Tek ^a   Abraham, Jacob A ^a  

^a IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; CRITICAL PATH ANALYSIS; ELECTRIC DELAY LINES; MICROPROCESSOR CHIPS; SEMICONDUCTOR DEVICE MODELS; SPURIOUS SIGNAL NOISE; VECTORS;

CRITICAL PATH IDENTIFICATION; DELAY TEST; PATH EXTRACTION;

LOGIC CIRCUITS;

EID: 0033343252     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)