Efficient VLSI implementation of radix-8 FFT algorithm

IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings

Volumn , Issue , 1999, Pages 468-471

  Jia, Lihong ^a   Gao, Yonghong ^a   Tenhunen, Hannu ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; FAST FOURIER TRANSFORMS; FREQUENCY MULTIPLYING CIRCUITS; INTEGRATED CIRCUIT LAYOUT; SEMICONDUCTING SILICON;

COMPLEX MULTIPLIERS; DIRECT MAPPING; HIGH RADIX BUTTERFLY ELEMENT; PIPELINING TECHNIC; VLSI IMPLEMENTATION;

VLSI CIRCUITS;

EID: 0033342856     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (8)