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Volumn , Issue , 1999, Pages 772-779

Relating linearity test results to design flaws of pipelined analog to digital converters

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CAPACITORS; ERROR ANALYSIS; INTEGRATED CIRCUIT LAYOUT; SIMULATION; SWITCHING NETWORKS;

EID: 0033342552     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (10)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.