Optimal P/N width ratio selection for standard cell libraries

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1999, Pages 178-184

  Kung, David S ^a   Puri, Ruchir ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED LOGIC DESIGN; COMPUTER SIMULATION; DATABASE SYSTEMS; LOGIC CIRCUITS; LOGIC GATES;

GATE DELAY MODELS; STANDARD CELL LIBRARIES;

CELLULAR ARRAYS;

EID: 0033334443     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)