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Volumn 3807, Issue , 1999, Pages 84-92
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Fault-tolerant arithmetic via time-shared TMR
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Author keywords
[No Author keywords available]
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Indexed keywords
ADDERS;
BIT ERROR RATE;
COMPARATOR CIRCUITS;
DIGITAL ARITHMETIC;
ERROR CORRECTION;
FAULT TOLERANT COMPUTER SYSTEMS;
MULTIPLYING CIRCUITS;
REDUNDANCY;
FAULT TOLERANT ARITHMETIC;
TIME SHARED TRIPLE MODULAR REDUNDANCY;
TIME SHARED TRIPLE MODULAR REDUNDANCY ADDITION;
TIME SHARED TRIPLE MODULAR REDUNDANCY MULTIPLICATION;
TRIPLE MODULAR REDUNDANCY;
DIGITAL SIGNAL PROCESSING;
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EID: 0033332264
PISSN: 0277786X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (11)
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