A testbed for evaluation of fault-tolerant routing in multiprocessor interconnection networks

IEEE Transactions on Parallel and Distributed Systems

Volumn 10, Issue 10, 1999, Pages 1052-1066

  Vaidya, Aniruddha S ^a,b   Das, Chita R ^a,b   Sivasubramaniam, Anand ^a,b  

^a IEEE   (United States)

^b PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

Application driven evaluation; Evaluation testbed; Fault tolerant routing; Interconnection network; Path selection heuristics; Router design

Indexed keywords

MULTIPROCESSOR INTERCONNECTION NETWORKS; PATH-SELECTION HEURISTICS;

ALGORITHMS; COMPUTER ARCHITECTURE; CONGESTION CONTROL (COMMUNICATION); ELECTRIC NETWORK TOPOLOGY; FAULT TOLERANT COMPUTER SYSTEMS; HEURISTIC METHODS; ROUTERS; TELECOMMUNICATION TRAFFIC;

INTERCONNECTION NETWORKS;

EID: 0033330621     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.808150     Document Type: Article

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