Fault-tolerant communication with partitioned dimension-order routers

IEEE Transactions on Parallel and Distributed Systems

Volumn 10, Issue 10, 1999, Pages 1026-1039

  Boppana, Rajendra V ^a,b   Chalasani, Suresh ^a,c  

^a IEEE

^b University of Texas at San Antonio   (United States)

^c TM Floyd and Company   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COMPUTER SYSTEMS PROGRAMMING; CONGESTION CONTROL (COMMUNICATION); INTERCONNECTION NETWORKS; RESPONSE TIME (COMPUTER SYSTEMS); ROUTERS; TELECOMMUNICATION TRAFFIC;

MESSAGE ROUTING; PARTITIONED DIMENSION-ORDER ROUTERS; TORUS NETWORKS; WORMHOLE ROUTING;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0033329698     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.808144     Document Type: Article

References (29)

1. K. Bolding and L. Snyder, "Overview of Fault Handling for the Chaos Router," Proc. 1991 IEEE Int'l Workshop Defect and Fault Tolerance in VLSI Systems, pp. 124-127, 1991.
2. K. Bolding and W. Yost, "Design of a Router for Fault-Tolerant Networks," Proc. Parallel Computer Routing and Comm. Workshop, pp. 226-240, May 1994.
3. R.V. Boppana and S. Chalasani, "Fault-Tolerant Routing with Non-Adaptive Wormhole Algorithms in Mesh Networks," Proc. Supercomputing '94, Nov. 1994.
4. R.V. Boppana and S. Chalasani, "Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks," IEEE Trans. Computers, vol. 44, no. 7, pp. 848-864, July 1995.
5. S. Borkar et al., "iWarp: An Integrated Solution to High-Speed Parallel Computing," Proc. Supercomputing '88, pp. 330-339, 1988.
6. Y.M. Boura and C.R. Das, "Fault-Tolerant Routing in Mesh Networks," Proc. 1995 Int'l Conf. Parallel Processing, pp. I.106-109, Aug. 1995.
7. S. Chalasani and R.V. Boppana, "Adaptive Fault-Tolerant Wormhole Routing Algorithms with Low Virtual Channel Requirements," Proc. Int'l Symp. Parallel Architectures, Algorithms and Networks, pp. 214-221, Dec. 1994.
8. S. Chalasani and R.V. Boppana, "Fault-Tolerant Wormhole Routing in Tori," Proc. Eighth ACM Int'l Conf. Supercomputing, pp. 146-155, July 1994.
9. S. Chalasani and R.V. Boppana, "Adaptive Wormhole Routing in Tori with Faults," IEE Proc.: Computers and Digital Techniques, vol. 142, pp. 386-394, Nov. 1995.
10. A.A. Chien, "A Cost and Speed Model for k-Ary n-Cube Wormhole Routers," Presented at Hot Interconnects 1993, Mar. 1993.
11. A.A. Chien and J.H. Kim, "Planar-Adaptive Routing: Low-Cost Adaptive Networks for Multiprocessors," Proc. 19th Ann. Int'l Symp. Computer Architecture, pp. 268-277, 1992.
12. Cray Research Inc., Cray T3D System Architecture Overview, Sept. 1993.
13. Cray Research Inc., Cray T3D Technical Summary, Oct. 1993.
14. W.J. Dally, "Network and Processor Architecture for Message-Driven Computers," VLSI and Parallel Computation, R. Suaya and G. Birtwislte, eds., chapter 3, pp. 140-222, San Mateo, Calif.: Morgan-Kaufman, 1990.
15. W.J. Dally, "Virtual-Channel Flow Control," IEEE Trans. Parallel and Distributed Systems, vol. 3, pp. 194-205, Mar. 1992.
16. W.J. Dally and H. Aoki, "Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels," IEEE Trans. Parallel and Distributed Systems, vol. 4, pp. 466-475, Apr. 1993.
17. W.J. Dally, L.R. Dennison, D. Harris, K. Kan, and T. Xanthopoulos, "The Reliable Router: A Reliable and High-Performance Communication Substrate for Parallel Computers," Proc. Parallel Computer Routing and Comm. Workshop, pp. 241-255, May 1994.
18. W.J. Dally and C.L. Seitz, "Deadlock-Free Message Routing in Multiprocessor Interconnection Networks," IEEE Trans. Computers, vol. 36, no. 5, pp. 547-553, 1987.
19. W.J. Dally and P. Song, "Design of a Self-Timed VLSI Multicomputer Communication Controller," Proc, Int'l Conf. Computer Design, pp. 230-234, 1987.
20. J. Duato, "A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks," IEEE Trans. Parallel and Distributed Systems, vol. 4, no. 12, pp. 1,320-1,331, Dec. 1993.
21. P.T. Gaughan and S. Yalamanchili, "A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks," IEEE Trans. Parallel and Distributed Systems, vol. 6, no. 5, pp. 482-497, May 1995.
22. C.J. Glass and L.M. Ni, "Fault-Tolerant Wormhole Routing in Meshes," Proc. 23rd Ann. Int'l Symp. Fault-Tolerant Computing, pp. 240-249, 1993.
23. Intel Corporation, Paragon XP/S Product Overview, 1991.
24. T. Lee and J. Hayes, "A Fault-Tolerant Communication Scheme for Hyper-cube Computers," IEEE Trans. Computers, vol. 41, no. 10, pp. 1,242-1,256, Oct. 1992.
25. Z. Liu and A.A. Chien, "Hierarchical Adaptive Routing," Proc. Sixth IEEE Symp. Parallel and Distributed Processing, 1994.
26. J.Y. Ngai and C.L. Seitz, "A Framework for Adaptive Routing in Multicomputer Networks," Proc. First Symp. Parallel Algorithms and Architectures, pp. 1-9, 1989.
27. T. Pinkston, Y. Choi, and M. Raksapatcharawong, "Architecture and Optoelectronic Implementation of the WARRP Router," Proc. Symp. Hot Interconnects V, Aug. 1997.
28. C.S. Raghavendra, P.-J. Yang, and S.-B. Tien, "Free Dimensions - An Effective Approach to Achieving Fault Tolerance in Hypercubes," Proc. 22nd Annual Int'l Symp. Fault-Tolerant Computing, pp. 170-177, 1992.
29. C.L. Seitz, "Concurrent Architectures," VLSI and Parallel Computation, R. Suaya and G. Birtwistle, eds., chapter 1, pp. 1-84, San Mateo, Calif.: Morgan-Kaufman, 1990.