Delay testing considering power supply noise effects

IEEE International Test Conference (TC)

Volumn , Issue , 1999, Pages 181-190

  Krstic, Angela ^a   Jiang, Yi Min ^a   Cheng, Kwang Ting ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC DELAY LINES; ELECTRIC POWER SUPPLIES TO APPARATUS; ESTIMATION; GENETIC ALGORITHMS; ITERATIVE METHODS; LOGIC GATES; SPURIOUS SIGNAL NOISE; STATISTICAL METHODS;

DELAY TEST GENERATION TECHNIQUE; POWER SUPPLY NOISE; SIGNAL PROPAGATION DELAY; SOFTWARE PACKAGE SPICE;

INTEGRATED CIRCUIT TESTING;

EID: 0033326871     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)