HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCS

IEEE International Test Conference (TC)

Volumn , Issue , 1999, Pages 1038-1044

  Benso, Alfredo ^a   Cataldo, Silvia ^a   Chiusano, Silvia ^a   Prinetto, Paolo ^a   Zorian, Yervant ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; HIERARCHICAL SYSTEMS; MICROPROCESSOR CHIPS; NETWORK PROTOCOLS; SCHEDULING;

HIERARCHICAL AND DISTRIBUTED BUILT-IN SELF TEST; HIERARCHICAL FRAMEWORK; SCHEDULING PRIMITIVES; SYSTEM-ON-CHIPS;

BUILT-IN SELF TEST;

EID: 0033326847     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)