Algorithm and circuit co-design for a low-power sequential decoder

Conference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers

Volumn 1, Issue , 1999, Pages 389-394

  Singh, S K ^a   Thiennviboon, P ^a   Ozdag, R O ^a   Tugsinavisut, S ^a   Beerel, P A ^a   Chugg, K M ^a  

^a University of Southern California ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL CODING; CONVOLUTIONAL CODES; DECODING; ENERGY UTILIZATION; FADING (RADIO); SIGNAL TO NOISE RATIO; TIMING CIRCUITS; VITERBI ALGORITHM; WHITE NOISE; ALGORITHMS; CELLULAR RADIO SYSTEMS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; SEQUENTIAL CIRCUITS; SPURIOUS SIGNAL NOISE;

CELLULAR SYSTEM; CMOS TECHNOLOGY; LOW ENERGY ARCHITECTURES; MOBILE RADIO ENVIRONMENT; OPERATIONAL SCENARIO; PERFORMANCE CHARACTERISTICS; PROPOSED ARCHITECTURES; VITERBI DECODER;

LOW POWER ELECTRONICS; DECODING;

ADDITIVE WHITE GAUSSIAN NOISE (AWGN); SEQUENTIAL DECODERS;

EID: 0033325357     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ACSSC.1999.832358     Document Type: Conference Paper

References (5)

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3. A. P. Chandrakasan and R. W. Brodersen. Low Power Digital Design. Kluwer Academic Publishers, 1995.
4. T. S. Rappaport. Wireless Communications. Prentice Hall, 1996.
5. J. M. Wozencraft and I. M. Jacobs. Principles of Communication Engineering. John Wiley and Sons, 1965.