VLSI architecture for analog-to-residue conversion

IEE Conference Publication

Volumn , Issue 466, 1999, Pages 83-85

  Preethy, A P ^a   Radhakrishnan, D ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ERROR CORRECTION; ITERATIVE METHODS; LOGIC CIRCUITS; LOGIC DESIGN; ROM; VLSI CIRCUITS;

DIRECT ANALOG TO RESIDUE CONVERTERS; FLASH CONVERTERS; MOST SIGNIFICANT BITS; RESIDUE NUMBER SYSTEM;

DATA PROCESSING;

EID: 0033324237     PISSN: 05379989     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)