Testability features of the 3rd generation ColdFire family of microprocessors

IEEE International Test Conference (TC)

Volumn , Issue , 1999, Pages 913-922

  Crouch, Alfred L ^a   Mateja, Michael ^a   McLaurin, Teresa L ^a   Potter, John C ^a   Tran, Dat ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS; INTERFACES (COMPUTER); LOGIC CIRCUITS; MICROPROCESSOR CHIPS; PHASE LOCKED LOOPS;

CLOCK SKEW; EMBEDDED MEMORY ARRAYS; MULTIPLE CLOCK DOMAIN CHALLENGES;

DESIGN FOR TESTABILITY;

EID: 0033317235     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)