Integrated approach to behavioral-level design-for-testability using value-range and variable testability techniques

IEEE International Test Conference (TC)

Volumn , Issue , 1999, Pages 858-867

  Seshadri, Sandhya ^a   Hsiao, Michael S ^a  

^a MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; CONTROLLABILITY; DATA PROCESSING; INTEGRATED CIRCUIT TESTING; OBSERVABILITY;

BEHAVIORAL LEVEL CIRCUIT DESCRIPTION; CONTROL DATA FLOW GRAPH; DATAFLOW ANALYSIS; PROFILING; VALUE RANGE PROPAGATION TECHNIQUE; VALUE RANGE TESTABILITY; VARIABLE TESTABILITY;

DESIGN FOR TESTABILITY;

EID: 0033314407     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)